Department of Computer Science and Automation

Indian Institute of Science, Bangalore, India

Kartik Nagar

PhD student

Note - I have submitted my PhD Thesis, and starting from August 2016, I will be joining Purdue CS as a post-doctoral research associate under the guidance of Prof. Suresh Jagannathan.

I am a fourth year PhD student under the guidance of Prof. Y.N. Srikant. Currently, I am working on timing analysis of programs for real-time systems. In general, I am interested in static analysis of programs and formal methods of verification. Here is my CV.

Publications

Journal Papers
  • Fast and Precise Worst Case Interference Placement for Shared Cache Analysis
    Kartik Nagar and Y N Srikant
    Accepted in ACM Transactions on Embedded Computing Systems (TECS), 2015 [pdf]
Conference Papers
  • Path Sensitive Cache Analysis using Cache Miss Paths
    Kartik Nagar and Y N Srikant
    International conference on Verification, Model Checking, and Abstract Interpretation (VMCAI) 2015 [pdf]

  • Precise Shared Cache Analysis using Optimal Interference Placement
    Kartik Nagar and Y N Srikant
    IEEE Real Time and Embedded Technology and Applications Symposium (RTAS) 2014 [pdf]

  • Interdependent Cache Analyses for better precision and safety
    Kartik Nagar and Y N Srikant
    ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) 2012 [pdf]
Others
  • Cache Analysis for Multi-level Data Caches
    ME Thesis, 2012 [pdf]

Awards and Honours

  • Awarded Microsoft Research India PhD fellowship, 2013.

Talks

  • Path Sensitive Cache Analysis using Cache Miss Paths, VMCAI 2015, Mumbai, India, January 2015.
  • Data flow Analysis, CSA Undergraduate Summer School on Computer Science, IISc, Bangalore, June 2014.
  • Precise Shared Cache Analysis using Optimal Interference Placement, RTAS 2014, Berlin, Germany, April 2014.
  • A Comprehensive Cache Analysis for Multi-level Caches, IMPECS-CSA Workshop on Program Analysis, IISc, Bangalore, September 2012.
  • Interdependent Cache Analyses for better precision and safety, MEMOCODE 2012, Arlington, Virginia, USA, July 2012.

Teaching Experience

  • Teaching Assistant for 'Algorithms and Programming' (Aug-Dec 2014) at IISc.
  • Teaching Assistant for 'Compiler Design' (Jan-Apr 2013) at IISc.
  • Teaching Assistant for 'Program Analysis and Verification' (Aug-Dec 2012) at IISc.

Hobbies

  • Reading SFF (Science Fiction and Fantasy). Check out my books on Goodreads.

Contact

Room # 2G-58

Compiler Lab

www.csa.iisc.ernet.in

kartik.nagar@csa.iisc.ernet.in

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